Effects of microcell layout on the performance of GaN-based high-voltage light-emitting diodes

Shuguang Li; Kin-Tak Lam; Wei-Chih Huang; Shoou-Jinn Chang

doi:10.1117/1.JPE.5.057605

9 March 2015 Effects of microcell layout on the performance of GaN-based high-voltage light-emitting diodes

Shuguang Li, Kin-Tak Lam, Wei-Chih Huang, Shoou-Jinn Chang

Author Affiliations +

Journal of Photonics for Energy, Vol. 5, Issue 1, 057605 (March 2015). https://doi.org/10.1117/1.JPE.5.057605

Abstract

We report the effects of microcell layout on the performances of GaN-based high-voltage light-emitting diodes (HV-LEDs). Compared with samples with an S-type layout pattern, it was found that the samples with an I-type layout pattern exhibit smaller forward voltage, larger light output power, lower thermal temperature, and better wall-plug efficiency (WPE). It was also found that we could further improve the performances of HV-LED chips by introducing extra metal fingers to enhance current spreading. Compared with the S-type sample without metal fingers, we could reduce the efficiency droop from 38.6% to 14.8% by using an I-type sample with metal fingers. Furthermore, it was found that WPE reduced by around 40% after a 1000 h aging test for the S-type sample without metal fingers. In contrast, almost no decrease in WPE could be observed from the I-type sample with metal fingers after the same aging time.

Citation Download Citation

Shuguang Li, Kin-Tak Lam, Wei-Chih Huang, and Shoou-Jinn Chang "Effects of microcell layout on the performance of GaN-based high-voltage light-emitting diodes," Journal of Photonics for Energy 5(1), 057605 (9 March 2015). https://doi.org/10.1117/1.JPE.5.057605

Published: 9 March 2015

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