Growth kinetics of InP nanowires heteroepitaxially grown on a silicon surface

Ataur R. Sarkar; Ibrahim Kimukin; Christopher W. Edgar; Sung Soo Yi; Christoph Mitterbauer; Nigel Browning; M. Saif Islam

doi:10.1117/12.738469

11 October 2007 Growth kinetics of InP nanowires heteroepitaxially grown on a silicon surface

Ataur R. Sarkar, Ibrahim Kimukin, Christopher W. Edgar, Sung Soo Yi, Christoph Mitterbauer, Nigel Browning, M. Saif Islam

Author Affiliations +

Proceedings Volume 6768, Nanomaterials Synthesis, Interfacing, and Integrating in Devices, Circuits, and Systems II; 676804 (2007) https://doi.org/10.1117/12.738469
Event: Optics East, 2007, Boston, MA, United States

Abstract

Low temperature metal catalyzed InP nanowires with diameters ranging from 50nm to 500nm using a single step MOCVD process at 450°C on (111)-oriented silicon substrates have been synthesized. The diameter range is much higher than the critical limit (~24nm for InP on silicon) reported by a recent theoretical work on coherent growth of nanowire heterostructures. This article presents the results of our investigation to highlight the possible factors that lead to the unusually large diameters and help realize stable nanowire heterostructures in a highly lattice mismatched material system. Our analysis finds dislocations formed at the interfacial plane of the heterostructure due to high lattice mismatch is the most influential factor contributing to very large diameters. We have simulation results which indicate that each added pair of orthogonal dislocation lines at the interfacial plane between InP and silicon supports ~12nm increase in the nanowire diameter. A maximum nanowire density of ~5×108 cm^-2 is estimated with growth rates ranging from 0.1 µm/min for the shortest nanowires and 10 μm/min for the longest ones.

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Ataur R. Sarkar, Ibrahim Kimukin, Christopher W. Edgar, Sung Soo Yi, Christoph Mitterbauer, Nigel Browning, and M. Saif Islam "Growth kinetics of InP nanowires heteroepitaxially grown on a silicon surface", Proc. SPIE 6768, Nanomaterials Synthesis, Interfacing, and Integrating in Devices, Circuits, and Systems II, 676804 (11 October 2007); https://doi.org/10.1117/12.738469

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KEYWORDS

Nanowires

Silicon

Heterojunctions

Gold

Crystals

Interfaces

Nanoparticles

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