Connected component labeling algorithm in streaming image processing with FPGAs

A. Bakumenko; V. Bakhchevnikov; V. Derkachev; A. Kovalev; V. Lobach; M. Potipak

doi:10.1117/12.2613546

14 November 2021 Connected component labeling algorithm in streaming image processing with FPGAs

A. Bakumenko, V. Bakhchevnikov, V. Derkachev, A. Kovalev, V. Lobach, M. Potipak

Proceedings Volume 11914, SPIE Future Sensing Technologies 2021; 119141I (2021) https://doi.org/10.1117/12.2613546
Event: SPIE Future Sensing Technologies, 2021, Online Only

Conference Poster

Abstract

The task of image fragments extraction with objects of interest is not new. The choice of appropriate segmentation algorithm and its implementation in real time mode become a problem in systems operating with a high-speed video data stream. Connected components labeling is an important step in training samples images preparation for usage in neural networks. To ensure high speed and feasibility of image labeling algorithm for the FPGA, it is necessary to justify the choice of segmentation algorithms, considering the hardware capabilities of the platform. In this paper, we propose a modified one-pass image labeling algorithm for FPGAs, as well as its implementation using the Xilinx System Generator for DSP and the Matlab/Simulink package. As a hardware platform the FMC-200-A mezzanine is used to provide high-speed video data stream from the line camera TELEDYNE DALSA LA-CC-04K05B00-R to the ZYNQ Ultrascale + MPSoC ZCU106 evaluation kit board. The procedure of using hardware implemented SPI interface on the MPSoC ZCU106 board, which is to configure and control the FMC200-A module is described. Implementation of SPI interface is made by using Vivado and Vitis IDE. The labeling results of proposed algorithm on test images, as well as images obtained experimentally are presented.

Citation Download Citation

A. Bakumenko, V. Bakhchevnikov, V. Derkachev, A. Kovalev, V. Lobach, and M. Potipak "Connected component labeling algorithm in streaming image processing with FPGAs", Proc. SPIE 11914, SPIE Future Sensing Technologies 2021, 119141I (14 November 2021); https://doi.org/10.1117/12.2613546

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