Paper
19 October 2022 Research and implementation of NR LDPC decoding acceleration based on software defined radio
Jiao Jun Li, Xun Zuo, Wei Wei, Fan Yang, Jie Huang, Chuan Yang, Shi Long Zhang
Author Affiliations +
Proceedings Volume 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering; 122940D (2022) https://doi.org/10.1117/12.2639684
Event: 7th International Symposium on Advances in Electrical, Electronics and Computer Engineering (ISAEECE 2022), 2022, Xishuangbanna, China
Abstract
Aiming at the problems of low efficiency, large delay and low throughput in LDPC decoding of OAI projects in current software defined radio platforms, this paper proposes a multi segment parallel decoding acceleration scheme for LDPC based on thread pool, and compares the LDPC decoding time and throughput between the architecture of this paper and the original OAI architecture under different LDPC segment numbers. Compared with the original OAI architecture, the architecture in this paper reduces the time required for LDPC decoding by 90.33% and increases the throughput by 145.71%, it improves the performance and practicability of the OAI project.
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Jiao Jun Li, Xun Zuo, Wei Wei, Fan Yang, Jie Huang, Chuan Yang, and Shi Long Zhang "Research and implementation of NR LDPC decoding acceleration based on software defined radio", Proc. SPIE 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering, 122940D (19 October 2022); https://doi.org/10.1117/12.2639684
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KEYWORDS
Modulation

Scientific research

Computer architecture

Error control coding

Manufacturing

Mobile communications

Network architectures

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