Design of 1553B bus interface module based on NIOS II

Mei Mei Lv; Chao Deng; Shizhe Liu; Lufeng Qiao

doi:10.1117/12.2639866

19 October 2022 Design of 1553B bus interface module based on NIOS II

Mei Mei Lv, Chao Deng, Shizhe Liu, Lufeng Qiao

Proceedings Volume 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering; 1229429 (2022) https://doi.org/10.1117/12.2639866
Event: 7th International Symposium on Advances in Electrical, Electronics and Computer Engineering (ISAEECE 2022), 2022, Xishuangbanna, China

Abstract

The MIL-STD-1553B bus (1553B for short) is a centralized time-sharing serial bus. Among the current military data buses, the 1553B bus is the most mature and widely used data bus. This paper expounds a design method of 1553B bus communication system with CPCI bus interface. The host system communicates with 1533B interface module through CPCI bus interface. The core structure is FPGA(EP2C35F672I8N), CPCI bus interface bridge chip (PCI9054) and 1553B bus controller (61580), The design, debugging and testing of 1553B bus interface module are realized by using NIOS II soft core processor.

Citation Download Citation

Mei Mei Lv, Chao Deng, Shizhe Liu, and Lufeng Qiao "Design of 1553B bus interface module based on NIOS II", Proc. SPIE 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering, 1229429 (19 October 2022); https://doi.org/10.1117/12.2639866

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KEYWORDS

Interfaces

Bridges

Field programmable gate arrays

Logic

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