Presentation + Paper
7 June 2024 65nm ROIC platform for next-generation infrared commercial and defense applications
David Howard, Arjun KarRoy, Michael Scott
Author Affiliations +
Abstract
A 65nm node RF and Analog CMOS process is described with advanced features for use in next generation ROICs. This process is in a unique position to enable both digital pixel ROICs and conventional ROIC architectures. The production process exists in a high-volume commercial fabrication facility and is being offered to aerospace and defense customers. Features to enable large array formats, such as stitching, up to nine layers of metal, low voltage operation are included, as well as multiple analog FETs, in particular low leakage, spanning low voltage up to 5V. Several analog features such resistors and MIM capacitors, and reconfigurable elements such as memory, e-fuse, will also be described. The platform process and device features, and special PDK features such as cryogenic models, will be related to select circuit block functions and requirements for large format applications such as cooled and uncooled ROICs.
Conference Presentation
© (2024) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
David Howard, Arjun KarRoy, and Michael Scott "65nm ROIC platform for next-generation infrared commercial and defense applications", Proc. SPIE 13046, Infrared Technology and Applications L, 130461F (7 June 2024); https://doi.org/10.1117/12.3013899
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KEYWORDS
Metals

Readout integrated circuits

Semiconducting wafers

Capacitors

Industrial applications

Transistors

Analog electronics

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