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Optical proximity correction (OPC) plays a critical role in the entire semiconductor manufacturing process. The consistency of identical patterns within the same context becomes increasingly crucial to ensure high performance during OPC processing, especially in areas like SRAM regions. Consistency checking essentially involves the classification of repeated patterns and the comparison of pattern layers (i.e., OPC results) . While SRAM mini-array designs can often be easily identified manually, there are still instances where the OPC team deals with is not mini-array but real designs, which lack sufficient hierarchical information to identify unit cells . Moreover, array designs can vary in type and style. Therefore, a fully automatic and generic method is necessary. This paper presents a fully automatic and generic method for classifying array designs using Calibre Pattern Matching and Calibre equation-based DRC (eqDRC). Unlike the traditional approach of sampling anchors with a fixed pitch and then running pattern classification, this new method first analyzes the array design to identify the actual array region, calculate the array cell size and generate cell markers. With the help of eqDRC, the cell size can be calculated both horizontally and vertically. Sampling anchors followed by identifying the actual cell helps classify repeating structures more effectively. After classification, a report on cell occurrence is generated, allowing only high-occurrence cells to be retained as unit cells. These cells can then be stored in a Pattern Matching Database (PMDB), which also includes OPC layers. Consistency of OPC results can be easily verified by outputting XOR results between the design and the patterns in the PMDB, utilizing the Calibre Partial Matching technique. Reviewing unmatched regions and XOR results helps identify new array types or inconsistent OPC results . This method would be very helpful for OPC engineer to collect the new array cell pattern s and the XOR results can help engineer to identify the process weak points, and if necessary, OPC modifications can be made before tape -out. This approach will significantly shorten the tape-out cycle time.
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