Micron and submicron interconnect modeling

Vijai K. Tripathi

doi:10.1117/12.145456

21 May 1993 Micron and submicron interconnect modeling (Abstract Only)

Vijai K. Tripathi

Proceedings Volume 1805, Submicrometer Metallization: Challenges, Opportunities, and Limitations; (1993) https://doi.org/10.1117/12.145456
Event: Microelectronic Processing '92, 1992, San Jose, CA, United States

Abstract

The techniques to study signal delay distortion and crosstalk in high density VLSI/ULSI micron and submicron interconnects are reviewed. These include numerical techniques based on the method of characteristics and the transform based techniques as well as frequency and time domain measurement techniques. The limitations of the classical modeling and measurement techniques in the submicron metallization regime are examined.

Citation Download Citation

Vijai K. Tripathi "Micron and submicron interconnect modeling (Abstract Only)", Proc. SPIE 1805, Submicrometer Metallization: Challenges, Opportunities, and Limitations, (21 May 1993); https://doi.org/10.1117/12.145456

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