High-speed custom VLSI DSP systems

Jonathon D. Mellot; Michael P. Lewis

doi:10.1117/12.241986

7 June 1996 High-speed custom VLSI DSP systems

Jonathon D. Mellot, Michael P. Lewis

Proceedings Volume 2750, Digital Signal Processing Technology; (1996) https://doi.org/10.1117/12.241986
Event: Aerospace/Defense Sensing and Controls, 1996, Orlando, FL, United States

Abstract

In this paper we examine the use of a recent innovation, called the logarithmic residue number system or LRNS, as an alternative to conventional DSP processors for implementing multiply-accumulate operations. We have fabricated a custom VLSI processor based upon this technology that is capable of providing substantial acceleration of vector arithmetic operations, convolution, correlation, and Fourier transforms in a relatively small, fast processor core when compared with implementations based on conventional arithmetic. The constituent arithmetic elements can be used as standard cells to implement application specific DSP designs.

Citation Download Citation

Jonathon D. Mellot and Michael P. Lewis "High-speed custom VLSI DSP systems", Proc. SPIE 2750, Digital Signal Processing Technology, (7 June 1996); https://doi.org/10.1117/12.241986

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