Paper
4 September 1998 Post-etching polymer removal in sub-half-micron device technology
Simon Y. M. Chooi, Zainab Ismail, Ping-Yu Ee, Mei-Sheng Zhou
Author Affiliations +
Abstract
The accomplishment of low-resistance interconnecting high- density ULSI integrated devices depends on the cleanliness of the via holes before metal deposition. This paper studies the polymer removal of via cleaning after etching and oxygen ashing using hydroxylamine-based organic solvent on an on-axis spray processor. An investigation into the effect of different process parameters such as spray pressure, rotational speed, cleaning duration and cleaning temperature was carried out. While the variation of spray pressure and rotational does not produce significant changes in the via resistance, the variation in the cleaning duration sees a lower via resistance as the duration is decreased. Additionally, the variation in cleaning temperature produces a process window between 75 degrees Celsius and 85 degrees Celsius (inclusive). The bypassing of isopropyl alcohol in the cleaning sequence gives comparable electrical resistance but suffers from high particle counts. There is no significant difference in via resistance for wafers processed on both Semitool Magnum and the wet bench. High resistance of zero and negative enclosed vias is found to be linked to the attack of titanium in the overlying metal stack.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Simon Y. M. Chooi, Zainab Ismail, Ping-Yu Ee, and Mei-Sheng Zhou "Post-etching polymer removal in sub-half-micron device technology", Proc. SPIE 3508, Multilevel Interconnect Technology II, (4 September 1998); https://doi.org/10.1117/12.324026
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Cited by 2 scholarly publications.
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KEYWORDS
Resistance

Polymers

Semiconducting wafers

Etching

Titanium

Metals

Oxides

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