Integration of Flowfill and Forcefill for cost-effective via applications

Werner K. Robl; Juergen Foerster; Uwe Hoeckele; Manfred Frank; David Butler; Paul Rich; K. Beekmann

doi:10.1117/12.360573

11 August 1999 Integration of Flowfill and Forcefill for cost-effective via applications

Werner K. Robl, Juergen Foerster, Uwe Hoeckele, Manfred Frank, David Butler, Paul Rich, K. Beekmann

Proceedings Volume 3883, Multilevel Interconnect Technology III; (1999) https://doi.org/10.1117/12.360573
Event: Microelectronic Manufacturing '99, 1999, Santa Clara, CA, United States

Abstract

This paper reviews work to integrate Flowfill^TM planarizing dielectric with Forcefill^TM aluminum plug in a 0.5/0.35 micrometers CMOS design. Work to reduce dielectric cracking by modifying the stress of the IMD material is described. The paper discusses liner choice for the Forcefill^TM interconnect and how it can influence lithography accuracy, line resistance and electromigration. The use of via chain resistance as a test to determine the degree of metal hole-fill is described.

Citation Download Citation

Werner K. Robl, Juergen Foerster, Uwe Hoeckele, Manfred Frank, David Butler, Paul Rich, and K. Beekmann "Integration of Flowfill and Forcefill for cost-effective via applications", Proc. SPIE 3883, Multilevel Interconnect Technology III, (11 August 1999); https://doi.org/10.1117/12.360573

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