A decimal carry-free adder

Hooman Nikmehr; Braden Phillips; Cheng-Chew Lim

doi:10.1117/12.584722

28 February 2005 A decimal carry-free adder

Hooman Nikmehr, Braden Phillips, Cheng-Chew Lim

Author Affiliations +

Proceedings Volume 5649, Smart Structures, Devices, and Systems II; (2005) https://doi.org/10.1117/12.584722
Event: Smart Materials, Nano-, and Micro-Smart Systems, 2004, Sydney, Australia

Abstract

Recently, decimal arithmetic has become attractive in the financial and commercial world including banking, tax calculation, currency conversion, insurance and accounting. Although computers are still carrying out decimal calculation using software libraries and binary floating-point numbers, it is likely that in the near future, all processors will be equipped with units performing decimal operations directly on decimal operands. One critical building block for some complex decimal operations is the decimal carry-free adder. This paper discusses the mathematical framework of the addition, introduces a new signed-digit format for representing decimal numbers and presents an efficient architectural implementation. Delay estimation analysis shows that the adder offers improved performance over earlier designs.

Citation Download Citation

Hooman Nikmehr, Braden Phillips, and Cheng-Chew Lim "A decimal carry-free adder", Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); https://doi.org/10.1117/12.584722

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