Nanoimprint lithography, NIL, has been developed for semiconductor lithography technology. Recently, cost-effective process for metal interconnects is one of the main challenges to keep scaling at a certain range of cost. Since NIL has the advantage on the resolution of interconnect patterns without design restriction and potential of transferring three-dimensional shapes, dual damascene by NIL which realize the process of metal interconnects and vias with single lithography step has been proposed. In this presentation, we will discuss the performance of our template for dual damascene processing targeting sub 20nm half pitch.
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