In this paper we report on the performance of a free-space optical communications (FSOC) modem implemented in FPGA, with data rate variable up to 60 Mbps. To combat the effects of atmospheric scintillation, a 7/8 rate low density parity check (LDPC) forward error correction is implemented along with custom bit and frame synchronisation and a variable length interleaver. We report on the systematic performance evaluation of an optical communications link employing the FPGA modems using a laboratory test-bed to simulate the effects of atmospheric turbulence. Log-normal fading is imposed onto the transmitted free-space beam using a custom LabVIEW program and an acoustic-optic modulator. The scintillation index, transmitted optical power and the scintillation bandwidth can all be independently varied allowing testing over a wide range of optical channel conditions. In particular, bit-error-ratio (BER) performance for different interleaver lengths is investigated as a function of the scintillation bandwidth. The laboratory results are compared to field measurements over 1.5km.
ABSTRACT
Free space optical (FSO) communication experiences severe fading due to optical scintillation in long-range links.
Adaptive schemes based on channel variation can utilize the channel capacity efficiently. In this paper, we propose
a truncated variable rate adaptive scheme for FSO channel. We determined the improvement in channel capacity
for perfect channel side information (CSI) at the transmitter and receiver using M-ary pulse position modulation
(M-PAM) format. We also determined the improvement in capacity for an erroneous feedback channel using one
link of a correlated bi-directional FSO link as a feedback link to the transmitter. Both synthetic and experimental
channel samples are used to determine the gain. For perfect CSI we have 1-2 dB improvement in channel capacity
compared to non-adaptive schemes using 2-PAM and 4-PAM modulation. For an erroneous feedback channel
the improvement depends on the channel correlation coefficient. With medium to high correlation it gives good
capacity improvement.
KEYWORDS: Photomicroscopy, Oscillators, Receivers, Linear filtering, Bandpass filters, Logic, VHF band, Signal detection, Sensors, Digital signal processing
High speed frequency dividers are critical parts of frequency synthesisers in wireless systems. These dividers
allow the output frequency from a voltage controlled oscillator to be compared with a much lower external
reference frequency that is commonly used in these synthesisers. Common trade-offs in high frequency dividers
are speed of division, power consumption, real estate area, and output signal dynamic range. In this paper
we demonstrate the design of a high frequency, low power divider in 0.18 µm SiGe BiCMOS technology. Three
dividers are presented, which are a regenerative divider, a master-slave divider, and a combination of regenerative
and master-slave dividers to perform a divide-by-8 chain. The dividers are used as part of a 60 GHz frequency
synthesizer. The simulation results are in agreement with measured performance of the regenerative divider.
At 48 GHz the divider consumes 18 mW from a 1.8 V supply voltage. The master-slave divider operates up to
36 GHz from a very low supply voltage, 1.8 V. The divide-by-8 operates successfully from 40 GHz to 50 GHz.
Conference Committee Involvement (1)
Microelectronics: Design, Technology, and Packaging III
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