Dr. Tomohiro Iwaki Profile

Dr. Tomohiro Iwaki

Principal Engineer at Micron Memory Japan Inc

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Publications (6)

Proceedings Article | 10 April 2024 Poster

Analyzing line width roughness (LWR) sensitivity to resist and laser-induced speckle for enhanced PSD-based quantification

Takamitsu Komaki, Tomohiro Iwaki, Yuichi Mukai, Kouichi Fujii, Toshihiro Kobayashi, Toshihiro Ohga, Kouji Kakizaki, Takashi Saito, Risa Yasue, Natsuki Okada, Katsunori Otsuki, Tomonori Okada, Kanji Sugino, Takahito Kumazaki

Proceedings Volume PC12953, PC129530S (2024) https://doi.org/10.1117/12.3008944

KEYWORDS: Speckle, Line width roughness, Semiconductors, Scanners, Lithography, Light sources, Chromatic aberrations

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Proceedings Article | 10 April 2024 Poster + Paper

Technology for high density CD measurement of EUV-processed resist patterns across a wafer ensuring high throughput and precision

Taeko Matsukata, Kazuhiko Fukazawa, Shigeru Hirukawa, Kaori Mukai, Yosuke Miyazaki, Yoshihiko Fujimori, Tomohiro Iwaki, Tomonori Okada

Proceedings Volume 12955, 129552O (2024) https://doi.org/10.1117/12.3010278

KEYWORDS: Semiconducting wafers, Critical dimension metrology, Reflection, Polarized light, Polarization, Image processing, Refractive index

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Proceedings Article | 9 April 2024 Poster + Paper

Wet etch process for high-resolution DSA patterning for advanced node DRAM

Hsing-Chen Wu, Ming-Chi Liao, Eri Hirahara, Tomohiro Iwaki

Proceedings Volume 12957, 1295721 (2024) https://doi.org/10.1117/12.3011188

KEYWORDS: Etching, Polymethylmethacrylate, Picosecond phenomena, Optical lithography, Wet etching, Ultraviolet radiation, Semiconducting wafers, Chemistry, Personal protective equipment, Directed self assembly

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Proceedings Article | 1 May 2023 Presentation + Paper

Pattern fidelity improvement of DSA hole patterns

Makoto Muramatsu, Takanori Nishi, Kiyohito Ito, Yoshihito Takahashi, Yasunori Hatamura, Takahiro Kitano, Tomohiro Iwaki

Proceedings Volume 12497, 124970J (2023) https://doi.org/10.1117/12.2658245

KEYWORDS: Block copolymers, Directed self assembly, Polymethylmethacrylate

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Directed Self-Assembly (DSA) has been reported many times in the past decade as a technique for forming fine patterns^{1- 12}. As processes for application to the semiconductor process, the grapho-epitaxy process forms a desired pattern in an isolated area using a physical guide, and the chemical-epitaxy process forms a single pitch over a wide range using a chemical guide are typical. There are many reports regarding the line pattern formation using a lamellar phase to meet the demand for miniaturization from the mass production of semiconductors, and this is partly because the lamellar phase is relatively stable. However, for fine line pattern formation, multiplication techniques such as SADP (self-aligned double patterning) and SAQP (self-aligned quadruple patterning) have matured, and in recent years, the number of cases where EUV (extreme ultra-violet) single exposure is used is increasing. For this reason, DSA is rarely used in mass production of semiconductors. On the other hand, when miniaturizing high-density hole patterns, methods such as multiple exposure and etching, and methods of forming holes by crossing line patterns formed by SADP are relatively expensive. In addition, it is difficult to maintain the uniformity of hole CD (critical dimension) and pitch. In addition, when EUV is applied, it is not easy to suppress defects and form a wide range of patterns due to stochasticity, which has become a problem in recent years. Therefore, the formation of high-density hole patterns using DSA is attracting attention. In DSA, the hole diameter can be controlled by the molecular weight of BCP (block co-polymer), and the pitch tends to be uniform spontaneously. Also, if the chemical-epitaxy process is used, the pattern can be formed over a wide range. However, hole patterns using a cylinder phase tend to have large fluctuations in hole diameter and placement due to the high degree of freedom in placement. It is also important to what extent the established process can be extended to further miniaturization. In this presentation, we report on the hole pattern formation method by the chemo-epitaxy method and efforts to improve the fidelity for application to the semiconductor process.

Proceedings Article | 30 April 2023 Presentation

To enhance EPE through PSD based quantification analysis of resist impact and lightsource induced LWR/LER

Toshihiro Oga, Takamitsu Komaki, Takeshi Ohta, Shinichi Matsumoto, Takashi Saitou, Tomohiro Iwaki, Kanji Sugino, Katsunori Otsuki

Proceedings Volume PC12494, PC124940C (2023) https://doi.org/10.1117/12.2658142

KEYWORDS: Semiconductors, Line edge roughness, Lithography, Line width roughness, Speckle, Manufacturing, Logic devices, Immersion lithography, Error analysis, Artificial intelligence

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Proceedings Article | 27 April 2023 Presentation + Paper

High-density CD measurement technology with high throughput and high precision on the entire surface of a process wafer, capable of capturing randomly occurring CD defects

Kazuhiko Fukazawa, Shigeru Hirukawa, Yosuke Miyazaki, Yoshihiko Fujimori, Tomohiro Iwaki, Tomonori Okada

Proceedings Volume 12496, 1249611 (2023) https://doi.org/10.1117/12.2657873

KEYWORDS: Semiconducting wafers, Critical dimension metrology, Diffraction, Error analysis, Signal intensity, Image processing, Etching, Photoresist processing

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Showing 5 of 6 publications

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